1. Technical Field
The present disclosure relates to shift registers and to frequency dividers comprising shift registers.
2. Description of the Related Art
U.S. Patent Application Publication No. 2006/0280278 describes a frequency divider circuit which has a chain of flip-flops that are connected by a feedback path to a feedback shift register. This document discloses a flip-flop formed by two latches comprising a cascaded differential stage.
In accordance with a prior art technique, in order to make the feedback shift register programmable, it is necessary to change the number of flip-flops in the shift register loop. This is currently made by using a multiplexer structured to select the flip flop where the feedback signal is taken from. It is observed that if multiphase clocks with constant phase shift have to be generated, additional multiplexers are needed to adjust the tap of the individual outputs to the programmed divisor.